Pulse width modulation (PWM) inverters for motor control applications have become common in recent years. A PWM inverter controls motor operation (driving) by controlling the voltage supplied to the motor by means of pulse width modulation. A common PWM inverter of this type is described below with reference to a typical block diagram thereof as shown in FIG. 20.
In the PWM inverter, the effective voltage and base frequency of a three-phase ac voltage waveform supplied to a motor 360 are first set in a frequency regulator 358. The PWM control circuit 359 then generates a three-phase PWM signal based on the voltage and frequency information set by the frequency regulator 358, and outputs this three-phase PWM signal as switching command signals 342, 361, and 362.
The switching command signals 342, 361, and 362 are two-value signals controlling whether motor winding terminals 352, 363, and 364 connect with the positive or negative terminal of a main dc power source 314. The frequency of the switching command signals 342, 361, and 362 is also known as the PWM carrier frequency, and is typically a frequency at least 100 times the base frequency of the three-phase ac voltage wave supplied to the motor 360.
As a result, the PWM carrier frequency typically ranges from 2 kHz to 20 kHz for a base frequency of 0 Hz to 200 Hz in the three-phase ac voltage wave supplied to the motor.
The motor free signal 356 is a two-value signal controlling whether the motor is set to a free-run mode. When the motor is set to this free-run mode, the motor winding terminals 352, 363, and 364 are disconnected from both the positive and negative terminals of the main dc power source 314 to protect the motor and control equipment when trouble occurs.
The PWM inverter output circuit 353 is a semiconductor switching circuit for controlling connection of the motor winding terminals 352, 363, and 364 to the positive or negative terminal of the main dc power source 314 based on the switching command signals 342, 361, and 362 input respectively thereto.
An exemplary PWM inverter output circuit 353 is described in Japanese Patent Laid-Open Publication No.6-284740 and shown in FIG. 21. Referring to FIG. 21, a signal equivalent to the switching command signals 342, 361, and 362 is input to an input terminal 203, and a signal equivalent to the motor free signal 356 is input to another input terminal 201. Motor winding terminal 352, 363, or 364 is equivalent to output terminal 205. The main dc power source 314 is equivalent to power source Vb. A distinguishing feature of this PWM inverter output circuit is that a switching operation with zero dead time is possible. More specifically, an n-channel power MOSFET 301 and a p-channel power MOSFET 302 are used as the power elements of a power circuit for outputting a predetermined high or low voltage from the output terminal 205 in this circuit, and the MOSFETs 301 and 302 are connected with common gates and sources.
It is therefore possible to alternately switch the power elements 301 and 302 on and off, switch the output terminal 205 to the positive or negative side of the power source Vb, and thereby output a high or low voltage by controlling the common gates of the power elements (MOSFETs) 301 and 302 using constant current elements (transistors) 119 and 229. Note that because of the common gate and source connections of the power MOSFETs 301 and 302, they cannot both be simultaneously on. PWM switching control with zero dead time is thus possible. Zero dead time switching control also prevents control error from occurring in the power circuit, thus suppressing motor noise vibration and torque fluctuations, and reducing power consumption.
In a PWM inverter output circuit related to the above mentioned invention, the constant current elements (transistors) 119 and 229 operate at a high voltage level, typically on the order of 300 V. The constant current elements (transistors) 119 and 229 thus produce heat when the power elements 301 and 302 switch on and off, and thereby inhibit further reductions in the size, power consumption, and cost of the circuit.
Circuit integration is widely known to be an effective means of reducing size, power consumption, and cost. While integration of the PWM inverter output circuit is therefore also desirable, it is necessary to resolve the aforementioned problem of transistor heat emissions.
The invention disclosed in Japanese Patent Laid Open Publication No.7-15978 was proposed as a solution to this problem by driving a power element pair by means of gate amplifiers. The gate amplifiers drive the power elements by drawing energy stored to a power supply capacitor. Because the voltage applied to the gate amplifier depends upon the voltage at both ends of the power supply capacitor, the applied voltage is necessarily controlled, heat generated by the gate amplifier is suppressed, and the problem of heat generation can be solved.
A problem with this invention, however, is that one of the pair of power elements in each phase, specifically the low voltage power element, must be turned on to complete a charging path when the power supply capacitor is charged. This introduces some substantial limitations with respect to motor control as described below.
Specifically, when a rotor of the motor is rotated by some external factor and an induction voltage is thus generated in the motor winding, turning the power element on the low voltage side on can short and damage the motor armature. Initial charging of the power supply capacitor is thus not possible. The technology disclosed in Japanese Patent Laid Open Publication No.7-15978 thus cannot be used for applications in which the rotor may be forcibly turned by the wind or other external factor. The fan motor in an outdoor compressor unit of an air conditioning system is one example of such applications.
When a motor is driven with PWM control, it is also not possible to sustain uninterrupted motor operation unless the low voltage power element is turned on to charge and refresh the power supply capacitor every PWM control cycle, that is, at a frequency of generally less than 1 ms. As a result, this technology also cannot be applied in, for example, two-phase PWM control applications in which the switching frequency is low. Note that the two-phase PWM control as used herein refers to the common PWM control technology known to be effective for reducing switching loss and leakage current by PWM switching two of the three phases and not switching one phase in a three-phase PWM inverter to control the drive voltage of the motor.
A similar PWM inverter output circuit is described in Japanese Patent Laid Open Publication No.4-230117 relating to a level shift circuit. This level shift circuit comprises a level shift transistor for level shifting, and prevents misoperation resulting from fast dv/dt transient phenomena occurring as a result of a floating capacitance at the drain or collector of the level shift transistor. To prevent the effects of a dv/dt transient signal resulting, for example, from noise, in the control pulse controlling the output driver, the cited invention comprises a pulse filter for filtering the control pulse applied to the output driver circuit for driving the power circuit. In other words, the effects of a fast dv/dt transient signal are prevented by means of the pulse filter blocking any control signal causing a change in voltage at shorter than a prescribed time.
The pulse filter of this method can thus prevent misoperation resulting from a fast dv/dt transient signal, but passes slow dv/dt transient signals and therefore cannot prevent misoperation caused thereby. A gentle dv/dt slope therefore cannot be used for noise suppression, causing problems in both circuit design and operation. Passing the control pulse to the output driver circuit through a pulse filter also introduces a delay, and thereby causes a drop in the overall response time.